PDP8e
The PDP8 series of computers, manufactured by Digital Equipment Corporation
(DEC), is considered the first successful 'mini-computer' to be produced.
The first model was announced in 1965, with several models following
and the PDP8/e was announced in 1970, along with the PDP8/f and PDP8/m
which used the same processor cards, but a smaller system box.
The PDP8/e is one of the last models in the PDP8 line. It is a single
address, fixed word length computer with a single accumulator and
two's complement, 12 bit arithmetic. The memory (and machine) cycle
is 1.2 microseconds (1.4 for auto indexing). The basic PDP8 has 4096 words of
12 bit memory, organised as 32 pages of 128 words each.
The optional extended
memory address and time share control (KME-8)
adds additional logic to allow 32K words
of memory to be addressed as 8 fields.
A memory reference instruction consists of a 3 bit opcode, 1 bit direct or
indirect mode, 1 bit page zero or current page mode and 7 bits for the page
address. Page 0 handles addresses 0010-0017 as a special case for auto-index
registers.
The instructions are divided into 8 groups :-
- AND (0XXX) - logical AND of accumulator and memory referenced by XXX.
- TAD (1XXX) - Two's complement add of memory referenced by XXX to the
accumulator.
- ISZ (2XXX) - Increment and skip if zero. Memory location referenced by
XXX is incremented, and the next instruction is skipped if the result was zero.
- DCA (3XXX) - Deposit and clear accumulator. The contents of the AC is
stored at the location referenced by XXX and the AC is cleared.
- JMS (4XXX) - Jump to subroutine. The current value of the program
counter is stored in location referenced by XXX, and program execution starts
at the following location. Note that this is strictly non-reentrant.
- JMP (5XXX) - Unconditional jump to location referenced by XXX
- IOT (6XXY) - I/O controller boards (and some internal cpu registers)
are accessed by these instructions. XX is the device code, and Y is the
operation to be performed.
- OPS (7XXX) - These are the microinstructions, arranged in three groups.
The groups are executed at different phases of the CPU clock and so several
steps can be coded into a single instruction. For example, 7200 clears the AC
and 7001 increments the AC. Combining both as 7201 sets the accumulator to 0001.
Operators Console
Switches left to right are :-
- Key switch. Power OFF, ON and panel lock (disable all switches except data)
- SW. Switch asserts OMNIBUS SW line. Used by some peripherals such as the
MI8-E bootstrap loader.
- Switch Register bits (0-11). Note that DEC has the most significant bit
numbered 0.
- ADDR LOAD. Loads the contents of the switch register into the CPMA
(central processor memory address) register. This is used as the address
for memory examines/deposits and for processor starts.
- EXTD ADDR LOAD. Loads the extended address bits (KM8-E option), bits
6-8 into the instruction field and bits 9-11 into the data field.
- CLEAR. Generate an initialise pulse, and load zeros into the AC and link
registers as well as clearing all flag bits in I/O registers.
- CONT. Starts the processor running at the address currently in the CPMA
register.
- EXAM. Loads the contents of the memory location pointed to by the CPMA
register into the MD (memory data) register, and increments the CPMA register.
Note that the display switch (described latter) must have MD selected.
- HALT. Halt the processor on the next instruction.
- SING STEP. When down, the processor will execute one instruction after
each depression of the continue switch.
- DEP. Lifting this switch will deposit the data in the switch register into
the memory location pointed to by the CPMA register. The register is then
incremented.
The lights are as follows (left to right, top to bottom) :-
- EMA - extended memory address bits
- Memory address display (0-11)
- RUN - processor running
- Data display, selected by mode switch
The display modes are:-
- STATE - The current processor state, bits 0-11 are :-
Fetch, Defer, Execute, IRQ 0-2, MD DIR, BREAK DATA CONT, SW, PAUSE, BREAK IN
and BREAK CYCLE
- STATUS - The current processor status, bits 0-11 are :-
Link set, greater than flag set, interrupt request, interrupt inhibit,
interrupt enabled, user mode, 3 bit instruction field and 3 bit data field.
- AC - accumulator register
- MD - memory data bus
- MQ - multiplier quotient
- BUS - OMNIBUS data lines
System Box
The system box is made up of a power supply (black box on the left) and
one or two omnibus backplanes containing 20 board slots.
Boards may be mounted anywhere in the
system. In the system pictured, the boards are as follows :-
- M8330, M8310 and M8300 - CPU boards
- M837 - Memory extension and time share control
- M865 - 20ma, 110 baud TTY control
- M8655 - RS232, 9600 baud TTY control
- M869 and M885 - Point plot display system
- Home made real-time clock (card with white handle)
- M840 - High speed paper tape reader and punch
- G227, G619 and G104 - Core memory system, 4 k words (green handles)
- G227, G619 and G104 - Core memory system, 4 k words (green handles)
- M832 - Bus loads
- Home made opto isolator interface board (horizontal on point plot power supply box).
System Components
The power supply uses linear regulators, rather than the more common switch
mode power supplies used today. As a result, it has several, very large
filter capacitors, and a large SCR for the 5 volt crowbar overvoltage
protection. The supply provided :-
- +5 volts @ 20 amps
- +15 volts @ 1 amp
- -15 volts @ 8 amps
- +8 volts unregulated for display lamps
The processor consists of 4 boards. There are 'over the top'
connector blocks for some of the signal interconnections. The boards are:-
- KCA-EA - Programmers console (front panel)
- M3800 - Major states register
- M3810 - Major registers control module
- M8330 - Timing generator module
- M849 - RF shield
The
core memory (4K by 12 bits) uses 3 boards :-
- G227 - XY driver and current source module
- G619 - Core memory stack
- G104 - Sense/Inhibit module
Finally, a M865 interfaces to an ASR-33 teletype using 20ma loop, and
the last board in the system in a M832 Bus loads module.
WEB site devoted to PDP-8's
Yet Another PDP-8 Web Site
Highgate's PDP-8 Page (has circuits)
Please address comments to John Holden at:-
johnh@psych.usyd.edu.au
Copyright © 2000 by John Holden