The processor is the bottom section of the system, with a VR-14 display sitting on top. You can see the light pen in its storage position on the right hand side.
Switches left to right are :-
Sequential examines or deposits would automatically increment the address pointer, while a deposit/examine cycle would leave the address unchanged. With the halt switch down, pressing continue would step the machine a single instruction. The 'PANEL LOCK' disables the start and halt switches.
The lights are as follows (left to right) :-
The 16 bit display is multiplexed to show either data or memory address. When the processor halts, the display will contain the halt address plus two. When the 'examine' or 'deposit' switch is depressed, the display will show the memory location to be used, and when the key is released, the data is displayed.