Early PDP-11 Peripherals
A one hex module real-time analogue subsystem, consisting of :-
16 channel, 10 bit A/D converter with sample-hold.
2 channel, 10 bit D/A with display control
Programmable crystal clock with external schmitt trigger input
Depending on options, this system could provide up to 32 channels of
A/D input, with a 12 bit bipolar converter. The subsystem was implemented in
a dedicated backplane and power supply that was bolted inside a cabinet. The
system used DECs FLIP CHIP series of logic cards. The
system was connected via a
The famous teletype. It was almost completely mechanical, and had a
continuously running motor. There was a mechanical reader and punch on the side
and it operated at 10 cps (characters per second).
By using two stop bits, and ensuring
that a line feed immediately followed carriage returns, there was just enough
time for the carriage to make it to column 1 from the far margin. Even the
parallel output from the keyboard (mechanically encoded of course) was
serialised by a distributor driven by the motor via a clutch.
It was possible to read and punch binary tapes, but the mechanics would
quickly wear out at tape, initially elongating the sprocket holes.
A replacement for the
It was a single quad card, and used
the new fangled UARTS. RS-232 was an option, and it used a crystal oscillator
in four speed groups.
A 16 bit general purpose DMA interface. It was a complete system unit with
four quad and one single width cards. One ugly feature was that the 16 bit
address counter didn't
overflow into the extended address bits, so that DMA transfers couldn't cross
64Kb boundaries. It was replaced by the DR11W, which was a single hex board
and became almost an industry standard for digial I/O interfaces.
The original digital I/O interface (latter replaced by a single card). It
consisted of a separate interrupt and address decode cards (single width)
and the I/O interface with side sockets for PC board cable connectors.
An eight port serial multiplexer with input silos and interrupt driven output.
Available as either RS232 or 20mA loop.
The Extented Arithmetic Element was a unibus peripheral that implemented
hardware multiply, divides, multiple shifts and fraction normalisation. It
was implemented as a number of registers in the I/O page; you would write
the operands into a set of eight registers. For a multiply, simply loading the
multiply register would initiate the calculation. This device was mainly used
on the PDP11/20 which lacked a multiply and divide instructions
(as did the /04, /05 and
The original serial interface for ASR-33 teletypes. It consisted of
three cards, a address decoder, interrupt controller and serial controller
card. The interface was set up for a 20mA loop, 110 baud with two stops bits.
Other speeds were available as options and
the timing was by a RC oscillator.
A general purpose peripherial processor using bit slice ALU (74181).
It could do DMA cycles to main memory, access the I/O page and generate
interrupts. It was used with the synchronous line unit (DMC11) to implement
DDCMP protocols. Also used with DZ-11 to ease the burden of interrupt per
output character by implementing pseudo DMA in software. One board could
run 5 DZ-11's.
The first in a long series of dot matrix printers from DEC and could
muster 30 characters per second. It required fill characters after carriage
This data acquisition system was designed to minimise the cost of building
realtime systems. It used a common address and interrupt logic to control
several internal devices. The following options were available :-
- 12 bit, 8 channel A/D converter (40KHz throughput)
- DMA interface for A/D
- Additional sample/hold amplifier for dual, simultaneous sampling
- Additional 8 channel A/D multiplexer
- Differential input amplifiers
- Programmable gain amplifiers
- Realtime programmable crystal clock with two Schmitt triggers
- Display control with two 12 bit D/A converters
- 16 bit buffered digital input / output with two relays
- Expansion box for an additional 48 analogue inputs and 8 outputs
- 6 digit programmable LED display (standard)
A high speed reader and punch. The reader used a large stepper motor
and optical sensing to attain 300 cps reading. It used unoiled
and would ramp up and down the motor speed for start/stops. Early models
strobed the data from the optical sensors from a delay after the stepper motor,
but were hard to adjust for correct data recovery. Latter models had a optical
sensor under the sprocket hole, which being smaller than data punch holes,
neatly strobed the data in the middle of the holes. The punch ran at 50 cps.
The RF11 disk controller can access up to eight RS11 fixed head disk drives.
Each drive stored 524Kb of data, addressable on 16 bit word boundaries
(most other DEC disk drives had 512 byte blocks). The drive used 128 fixed
read/write heads and recorded data on a single nickel-cobalt plated surface.
The data transfer
rate was 125K bytes per second. The controller occupied the top of a cabinet
and had a wire wrapped backplane.
These used a single platter,
removable pack for 1.25Mb of data (RK02)
or 2.5 Mb of data (RK03/05). The initial controller was the RK11C which
used 'flip chip' modules to build the controller on a large wire-wrapped
backplane that mounted in the top of a cabinet. The latter RK11D controller
consisted of 4 quad boards in a custom system unit, mounted within a
CPU or expansion box. It was possible to have up to eight drives per controller.
Only the RK05 drive was manufactured by DEC, the others being rebadged Pertecs.
The RK05 drives did not use embedded servo tracks as latter ones did, but used
an optical encoder to sense the position of the voice coil head positioner.
A special alignment disk pack was required to calibrate the heads
(which was a yearly event). It had specially recorded, off axis data bursts
and a CRO was used to match the amplitudes to center the heads. They could
only be adjusted out, so if you went too far, the drive had to be run down
and the heads pushed back in. The drive geometry was :-
- 203 tracks
- 12 sectors
- 2 heads
- 512 byte data blocks
This was dual tape transport that used small 3.9 inch spools of
3/4 inch tape.
The system used 10 tracks, 4 for timing and mark, and the
other tracks as a redundant 3+3 Manchester encoded data. The tape paths
were short and air buffered. It was possible to read/write data in either
direction, and the system was unusual in that each block was addressable
and the system could be treated like a slow disk drive. Some early
operating systems for the PDP-11 (and others like the PDP-8) could
run the entire operating system from these units.
This is the display processor that was combined with a PDP11/05
in a machine called a
It was a separate processor that drove a
1024x1024 vector graphic display. It could generate characters, points and
lines in hardware (using binary rate multipliers), eight levels of display
intensity and had a light pen. The processor shared the same memory as the
which would set up a 'display list' for the system to output. The same processor
was latter combined with the faster PDP11/40 to produce GT-44.