PDP11/70


Operators Console

Switches left to right are :-

Sequential examines or deposits would automatically increment the address pointer, while a deposit/examine cycle would leave the address unchanged. With the halt switch down, pressing continue would step the machine a single instruction or bus cycle.

The lights are as follows (left to right, top to bottom) :-


System Backplane

There are two versions of the processor, the original KB-11B, and the KB-11C which supported the upgraded floating point processor (FP11C). A processor consisted of 22 cards, plus 16 dedicated slots for 4 massbus controllers, DL-11 serial console and 4 small peripheral contoller slots. The system backplane consists of :-

SlotKB11-CKB11-BCardDescription
1CPU and FPU maintenance slots, KW11 line time clock and bus terminator
2M8126M8114FRHfloating point fraction data path high order
3M8127M8115FRLfloating point fraction data path low order
4M8128M8112FRMfloating point ROM and control
5M8129M8113FXPfloating point exponent data path
6M8130DAPdata paths
7M8131GRAgeneral registers and ALU control
8M8132IRCinstruction decode and condition codes
9M8233M8133RACROM and ROM control
10M8134PDRprocessor data and unibus registers
11M8135TMCtrap and miscellaneous control
12M8136UBCunibus and console control
13M8139TIGtiming generator
14M8137SAPsystem address path
15M8138-YAM8138SSRsystem status registers
16M8140SCCconsole cables and system registers
17M8142CCBcache control
18M8143ADMaddress memory board
19>Empty
20M8144DTMdata memory (cache)
21M8145CDPcache data path
22M8141MAPunibus map