The PDP11/35 and PDP11/40 were the same processor with different packaging
options.
Switches left to right are :-
Sequential examines or deposits would automatically increment the address
pointer, while a deposit/examine cycle would leave the address unchanged. With
the halt switch down, pressing continue would step the machine a single
instruction or bus cycle.
The lights are as follows (left to right, top to bottom) :-
When the processor halts, the address display will contain the halt address
plus two. The data display will contain the current value for R0 (general
cpu register 0).
The RUN light is unusual is that it shows that the processor clock is running,
not that it is executing instructions. The light remains on when the processor
is halted, and the CONSOLE light comes on.
You can have fun and program a light chaser in the data display using the fact
that during a reset instruction, the data display will show the current
value for R0. Toggle in the following program and start at 001000. Note that
the RUN light will go out!
Location Contents Opcode Comment
001000 012700 mov #1,r0 Load 1 into R0
001002 000001
001004 006100 rol r0 Rotate R0 left
001006 000005 reset Initialise bus (70ms)
001010 000775 br .-4 Loop back to 'rol r0'
The 11/40 has billions (Carl Sagans) of options. The minimal processor had
the base set, plus SOB, MARK, RTT, XOR and SXT. Processor options added extra
microcode and extra shift registers and counters to the data path.
The processor options had dedicated slots, but lots of jumpers have to be
changed to enable them (adding memory management requires 12 jumpers to be
changed, along with 2 capacitors to change timing).
Note that there are just four floating point
instructions (not directly compatible with any FPP instruction), and they
are not very PDP-11 like in their behaviour. The instructions have a three bit
address field to specify a register. The register points to a 'floating point
stack frame' that contains the arguments for the instruction in memory. The
floating point number format is the same as FPP.
The line time clock (M787) is the original card used in the 11/20 (and 11/45/50/55/70)!
Option Description Board Number Slot KE11-E EIS instruction set (ASH, ASHC, DIV, MUL) M7238 2
KE11-F FIS instruction set (FDIV, FMUL, FADD, FSUB) M7239 1
KJ11-A Stack limit register M7237 3E
KT11-D Memory management M7236 8
KW11-L Line time clock M787 3F
Processor slots (right to left):-
A fully optioned up 11/35. Bottom to top is:-
Processor Backplane
Memory Backplane (64Kb of interleaved core)
Small peripheral controller backplane