Operators Console

The PDP11/35 and PDP11/40 were the same processor with different packaging options.

Switches left to right are :-

Sequential examines or deposits would automatically increment the address pointer, while a deposit/examine cycle would leave the address unchanged. With the halt switch down, pressing continue would step the machine a single instruction or bus cycle.

The lights are as follows (left to right, top to bottom) :-

When the processor halts, the address display will contain the halt address plus two. The data display will contain the current value for R0 (general cpu register 0).

The RUN light is unusual is that it shows that the processor clock is running, not that it is executing instructions. The light remains on when the processor is halted, and the CONSOLE light comes on.

You can have fun and program a light chaser in the data display using the fact that during a reset instruction, the data display will show the current value for R0. Toggle in the following program and start at 001000. Note that the RUN light will go out!

	Location	Contents	Opcode		Comment
	001000		012700		mov #1,r0	Load 1 into R0
	001002		000001
	001004		006100		rol r0		Rotate R0 left
	001006		000005		reset		Initialise bus (70ms)
	001010		000775		br .-4		Loop back to 'rol r0'

Processor Options

The 11/40 has billions (Carl Sagans) of options. The minimal processor had the base set, plus SOB, MARK, RTT, XOR and SXT. Processor options added extra microcode and extra shift registers and counters to the data path.

OptionDescriptionBoard NumberSlot
KE11-EEIS instruction set (ASH, ASHC, DIV, MUL)M72382
KE11-FFIS instruction set (FDIV, FMUL, FADD, FSUB)M72391
KJ11-AStack limit registerM72373E
KT11-DMemory managementM72368
KW11-LLine time clockM7873F

The processor options had dedicated slots, but lots of jumpers have to be changed to enable them (adding memory management requires 12 jumpers to be changed, along with 2 capacitors to change timing). Note that there are just four floating point instructions (not directly compatible with any FPP instruction), and they are not very PDP-11 like in their behaviour. The instructions have a three bit address field to specify a register. The register points to a 'floating point stack frame' that contains the arguments for the instruction in memory. The floating point number format is the same as FPP.

The line time clock (M787) is the original card used in the 11/20 (and 11/45/50/55/70)!

System Boards

11/40 cabinet

Processor slots (right to left):-

  1. M7239 Optional KE11F (floating point instruction set, requires KE11E), maintenance card slots
  2. M7239 Optional KE11E EIS
  3. M7232 Microcode ROMS, optional stack limit register (KJ11) and line time clock (KW11)
  4. M7231 Data paths
  5. M7233 Instruction register and decode
  6. M7235 Status
  7. M7234 Timing
  8. M7236 Optional memory management (KT-11D)
  9. M931 Small peripheral controller slot and Unibus jumper (with terminators)

PDP11/35 System Box

A fully optioned up 11/35. Bottom to top is:-

Processor Backplane

  • FIS and EIS options with cables to the microcode card (slots 1 & 2)
  • Stack limit and line time clock cards (slot 3, magenta handles)
  • Processor (slots 3-7)
  • Memory management option (slot 8)
  • DL-11 console card and unibus jumper/terminator (slot 9)

    Memory Backplane (64Kb of interleaved core)

  • Timing card
  • Parity register card
  • X-Y driver card
  • Core stack
  • Sense/Inhibit card
  • Sense/Inhibit card
  • X-Y driver card
  • Timing card

    Small peripheral controller backplane

  • DZ-11 8 line RS-232 interface card (with cable to distribution panel)
  • Terminator/Bootstrap card

    PDP11/35 draw extended (with 11/45 and 11/70 in background)

    Power Supply (11/40)

    Power Supply Module